EP2S30F672C5N
| Part Description |
Stratix® II Field Programmable Gate Array (FPGA) IC 500 1369728 33880 672-BBGA |
|---|---|
| Quantity | 321 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 500 | Voltage | 1.15 V - 1.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1694 | Number of Logic Elements/Cells | 33880 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 1369728 |
Overview of EP2S30F672C5N – Stratix® II Field Programmable Gate Array (FPGA) IC 500 1369728 33880 672-BBGA
The EP2S30F672C5N is a Stratix II family FPGA delivering 33,880 logic elements and approximately 1.37 Mbits of on-chip RAM for high-density programmable logic implementations. Built in a 672-ball BGA footprint, the device provides 500 I/O pins and a commercial operating range suitable for a broad set of embedded and board-level designs.
Designed around the Stratix II architecture and accompanying device features (clocking, memory, DSP and configurable I/O), this FPGA targets applications that require significant logic capacity, extensive I/O, and embedded memory within a surface-mount package.
Key Features
- Logic Capacity 33,880 logic elements provide substantial programmable logic resources for complex designs and system-level integration.
- Embedded Memory Approximately 1.37 Mbits of on-chip RAM to support buffering, on-chip data storage, and memory-intensive logic functions.
- I/O Density 500 user I/O pins enable rich external interfacing and parallel connectivity for high-pin-count systems.
- Package & Mounting 672-ball BGA package (supplier device package listed as 672-FBGA, 27×27) in a surface-mount form factor for PCB integration.
- Power Supply Core supply range of 1.15 V to 1.25 V to match board power-rail designs and system power budgeting.
- Operating Temperature & Grade Commercial grade with an operating temperature range of 0 °C to 85 °C for typical commercial and enterprise environments.
- Stratix II Family Capabilities Includes the Stratix II architecture features described in the device handbook such as logic array blocks, TriMatrix memory, DSP blocks, PLLs and clock networks, advanced I/O structure, and configuration/testing support (JTAG, embedded logic analysis).
- Compliance RoHS-compliant construction for regulatory and assembly compatibility.
Typical Applications
- High-density board-level systems Use the EP2S30F672C5N where a large number of I/Os and significant logic resources are required on a single PCB.
- Memory and interface bridging On-chip RAM and the family’s external RAM interfacing features support designs that require local buffering and memory interface logic.
- Signal processing and DSP functions The Stratix II device capabilities for DSP and dedicated math blocks are suitable for embedded signal processing tasks within a programmable fabric.
Unique Advantages
- Substantial logic and memory in one device: 33,880 logic elements combined with approximately 1.37 Mbits of embedded RAM reduce the need for external programmable logic or large discrete memory arrays.
- High I/O count for flexible system design: 500 I/O pins enable multiple parallel interfaces and high-density external connectivity without multiple FPGAs.
- Standard surface-mount BGA package: 672-ball BGA (supplier 672-FBGA, 27×27) simplifies board layout for compact, high-pin-count assemblies.
- Controlled power envelope: Defined core supply range (1.15 V–1.25 V) supports predictable power sequencing and supply design.
- Proven family architecture: Features detailed in the Stratix II device handbook—clocking, memory matrix, DSP blocks, and configuration/test support—help streamline development using established architectural primitives.
- RoHS compliance: Enables use in modern manufacturing flows requiring lead-free assembly compliance.
Why Choose EP2S30F672C5N?
The EP2S30F672C5N is positioned for designers who need a high-capacity, commercially graded Stratix II FPGA with extensive I/O and embedded memory in a compact BGA package. Its combination of 33,880 logic elements, roughly 1.37 Mbits of on-chip RAM, and 500 I/O makes it suitable for system-level designs that consolidate logic, buffering, and interface functions into a single programmable device.
Choosing this part provides a clear upgrade path within the Stratix II family and leverages the documented architecture and features from the device handbook—helpful for teams seeking predictable implementation, configuration, and test flows supported by the family documentation.
Request a quote or submit an inquiry for EP2S30F672C5N to receive pricing, lead-time, and availability information tailored to your project needs.

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