EP2S90F1508C4
| Part Description |
Stratix® II Field Programmable Gate Array (FPGA) IC 902 4520488 90960 1508-BBGA, FCBGA |
|---|---|
| Quantity | 186 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1508-FBGA, FC (40x40) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1508-BBGA, FCBGA | Number of I/O | 902 | Voltage | 1.15 V - 1.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 4548 | Number of Logic Elements/Cells | 90960 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4520488 |
Overview of EP2S90F1508C4 – Stratix® II FPGA, 90,960 logic elements, 1508-FBGA
The EP2S90F1508C4 is a Stratix® II field programmable gate array (FPGA) from Intel, designed for applications that require large logic capacity, extensive I/O and substantial on-chip memory. Built on the Stratix II architecture, the device targets high-density custom logic, complex I/O interfacing and systems that benefit from programmable, reconfigurable hardware.
With 90,960 logic elements, approximately 4.52 Mbits of embedded memory and 902 I/O pins in a 1508-ball FBGA package, this commercial-grade FPGA suits high-performance prototyping, communications and data-processing designs that require a compact surface-mount package and a 1.15–1.25 V core supply.
Key Features
- Core Capacity 90,960 logic elements arranged across 4,548 LABs to support large combinational and sequential designs.
- Embedded Memory Approximately 4.52 Mbits of on-chip RAM with the Stratix II TriMatrix memory architecture referenced in the device handbook for flexible memory partitioning and usage.
- I/O Density & Standards 902 I/O pins provide broad interfacing capability; device documentation includes support for Double Data Rate I/O, advanced I/O standards, multi‑volt I/O and on‑chip termination.
- Clocking & PLLs Stratix II clocking features such as global and hierarchical clock networks and enhanced/fast PLLs are documented for designs requiring disciplined clock distribution and clock management.
- Configuration & Debug Supports industry-standard configuration and test features documented in the handbook, including IEEE 1149.1 JTAG boundary-scan and the SignalTap II embedded logic analyzer for in-system debug and visibility.
- Power & Thermal Core supply range of 1.15 V to 1.25 V and commercial operating temperature range of 0 °C to 85 °C for typical commercial deployments.
- Package & Mounting 1508-BBGA (1508-FBGA, FC 40×40) surface-mount package optimized for compact board-level integration and high I/O density.
- Compliance RoHS compliant, aligning with common electronic materials requirements.
Typical Applications
- High‑performance prototyping Large logic capacity and abundant I/O make the FPGA suitable for validating complex ASIC/SoC algorithms and system integration before production.
- Communications & Networking High I/O count and Stratix II I/O features enable protocol bridging, packet processing and custom interface implementations.
- Signal Processing Significant on‑chip RAM and dense logic resources support DSP pipelines, buffering and custom data manipulation tasks.
- Test & Measurement JTAG boundary-scan, embedded logic analysis and reconfigurable logic provide flexible instrumentation and in-field test capabilities.
Unique Advantages
- High logic density: 90,960 logic elements provide the capacity to implement large, partitioned designs without immediate migration to multiple devices.
- Substantial on‑chip memory: Approximately 4.52 Mbits of embedded RAM reduces external memory requirements for many buffering and local storage needs.
- Extensive I/O flexibility: 902 I/O pins and documented support for DDR and advanced I/O standards enable versatile interfacing and high throughput connections.
- Configurable clocking: Stratix II clocking structures and PLL options in the device handbook support complex clock domains and low-skew distribution.
- Compact, surface‑mount package: The 1508-FBGA (40×40) package delivers high pin count in a board-friendly form factor for dense system integration.
- Established documentation: Device details are covered in the Stratix II Device Handbook, providing designers with architecture, configuration and timing guidance.
Why Choose EP2S90F1508C4?
The EP2S90F1508C4 combines a large logic fabric, multi-megabit embedded memory and a high I/O count within a compact 1508-ball FBGA package, making it a fit for designs that demand on-board programmability and significant on-chip resources. Its documented Stratix II architecture—including memory, clocking and I/O capabilities—supports complex system designs that require flexible implementation and in-system debug.
This device is well suited for engineering teams building advanced prototypes, communications equipment, signal processing modules and test systems that benefit from a commercial-grade FPGA with robust documentation and reconfigurable hardware capacity.
Request a quote or submit an inquiry to our sales team for pricing, availability and additional technical information about EP2S90F1508C4.

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