EP3SL340F1517C3N

IC FPGA 976 I/O 1517FBGA
Part Description

Stratix® III L Field Programmable Gate Array (FPGA) IC 976 18822144 337500 1517-BBGA, FCBGA

Quantity 886 Available (as of May 6, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package1517-FBGA (40x40)GradeCommercialOperating Temperature0°C – 85°C
Package / Case1517-BBGA, FCBGANumber of I/O976Voltage860 mV - 1.15 V
Mounting MethodSurface MountRoHS ComplianceRoHS CompliantREACH ComplianceREACH Unknown
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs13500Number of Logic Elements/Cells337500
Number of GatesN/AECCN3A001A7AHTS Code8542.39.0001
QualificationN/ATotal RAM Bits18822144

Overview of EP3SL340F1517C3N – Stratix® III L Field Programmable Gate Array (FPGA), 1517-FBGA (40×40)

The EP3SL340F1517C3N is a Stratix® III L FPGA in a 1517-FBGA (40×40) surface-mount package. It delivers a large on-chip resource set—337,500 logic elements, approximately 18.8 Mbits of embedded RAM, and 976 I/Os—designed for complex, high-integration FPGA designs.

As part of the Stratix III family, the device incorporates family-level architecture elements documented in the device handbook, including TriMatrix embedded memory blocks, DSP blocks, clock networks and PLLs, and high-speed differential I/O with DPA. The device is commercial grade (0 °C to 85 °C) and RoHS compliant.

Key Features

  • Core and Logic Capacity  Approximately 337,500 logic elements with 13,500 logic blocks to implement large, multi-function designs.
  • Embedded Memory  Approximately 18.8 Mbits of on-chip RAM provided by TriMatrix embedded memory blocks for frame buffers, caches, and data buffering.
  • DSP and Signal Processing  Dedicated DSP block resources (as documented in the Stratix III handbook) to accelerate arithmetic and signal-processing functions.
  • I/O and High-Speed Interfaces  976 user I/Os and family-level support for high-speed differential I/O with DPA for demanding interface and transceiver applications.
  • Package and Mounting  1517-FBGA (40×40) package in a surface-mount form factor suitable for compact board layouts.
  • Power Supply Range  Core voltage supply range from 0.86 V to 1.15 V to match Stratix III L core requirements.
  • Temperature and Grade  Commercial-grade device rated for 0 °C to 85 °C operation.
  • System and Configuration Features  Family documentation highlights configuration options, remote system upgrade capability, IEEE 1149.1 JTAG boundary-scan testing, design security, SEU mitigation, and programmable power controls.
  • Environmental Compliance  RoHS compliant.

Typical Applications

  • External Memory Interfaces  Implements memory controllers and high-bandwidth interfaces using the device’s large logic and embedded RAM resources.
  • High-Speed I/O and Transceiver Logic  Supports designs requiring dense I/O and family-level high-speed differential I/O capabilities for serial links and custom protocol endpoints.
  • Digital Signal Processing  Leverages DSP blocks and abundant logic/memory for filtering, codec support, and real-time data processing pipelines.
  • Complex System Control and Prototyping  Combines extensive I/O, logic capacity, and configuration features for integrated system control, prototype validation, and FPGA-based acceleration.

Unique Advantages

  • Large Logic Resource Pool: Enables implementation of complex, multi-domain designs without partitioning across multiple devices.
  • Substantial On-Chip Memory: Approximately 18.8 Mbits of embedded RAM reduces external memory dependence and simplifies board-level BOM.
  • High I/O Density: 976 I/Os provide flexibility for interfacing to many peripherals, memory buses, and parallel data streams.
  • Family-Level High-Speed Features: Stratix III family capabilities such as high-speed differential I/O with DPA and PLL/clock networks support demanding timing and interface requirements.
  • Commercial Temperature Range: Specified 0 °C to 85 °C operation for standard commercial applications.
  • Standards-Based Test & Configuration: Includes IEEE 1149.1 JTAG boundary-scan testing and documented configuration schemes for reliable production validation and field updates.

Why Choose EP3SL340F1517C3N?

The EP3SL340F1517C3N combines high logic density, sizable embedded RAM, and extensive I/O in a 1517-FBGA package to address complex FPGA implementations that require integrated memory, DSP acceleration, and dense interfacing. Its family-documented architecture elements—TriMatrix memory, DSP blocks, robust clocking, and high-speed differential I/O—provide a clear platform for system architects targeting large, feature-rich designs.

Ideal for engineering teams building advanced controllers, memory interfaces, signal-processing pipelines, or prototype platforms, the device offers the scalability and documented system features needed to streamline development while maintaining commercial-grade operating conditions and RoHS compliance.

Request a quote or submit an inquiry to check pricing and availability for the EP3SL340F1517C3N and to discuss how it fits your next design.

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