EPF6016ATI144-3
| Part Description |
FLEX 6000 Field Programmable Gate Array (FPGA) IC 117 1320 144-LQFP |
|---|---|
| Quantity | 40 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 117 | Voltage | 3 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 132 | Number of Logic Elements/Cells | 1320 | ||
| Number of Gates | 16000 | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of EPF6016ATI144-3 – FLEX 6000 Field Programmable Gate Array (FPGA), 144‑LQFP
The EPF6016ATI144-3 is an Intel FLEX 6000 series field programmable gate array (FPGA) featuring the OptiFLEX register-rich, look-up table (LUT) architecture. The device provides 1,320 logic elements (approximately 16,000 gates) and 117 user I/O pins in a 144‑pin LQFP surface-mount package.
Designed for mid-density programmable logic applications, this industrial-grade FPGA supports in-circuit reconfiguration, boundary-scan testing, and flexible I/O control. It is suited for designers seeking a reprogrammable alternative to fixed gate-array implementations with a focus on deployable industrial environments.
Key Features
- Core architecture OptiFLEX register-rich LUT-based architecture with 1,320 logic elements and approximately 16,000 typical gates for mid-density logic implementations.
- I/O control 117 user I/O pins with individual tri-state output enable control and programmable output slew-rate to manage switching noise and interface timing.
- Configuration and test Supports in-circuit reconfigurability (ICR) via external configuration device or intelligent controller, and includes IEEE Std. 1149.1 JTAG boundary-scan test (BST) circuitry.
- Interconnect and arithmetic support FastTrack interconnect with dedicated carry and cascade chains to implement fast adders, counters, and high-fan-in logic functions.
- Clocking Built-in low-skew clock distribution tree and multiple global low-skew paths to support predictable timing on clock, clear, preset, or other global signals.
- Memory Total on-chip RAM bits: 0 (device is provided without embedded RAM).
- Package and mounting 144-pin LQFP surface-mount package; supplier reference also lists 144-TQFP (20×20). RoHS compliant.
- Power and temperature Supply voltage range 3.0 V to 3.6 V. Operating temperature range −40 °C to 100 °C; device grade: Industrial.
Typical Applications
- Prototyping and design validation Reprogrammable logic enables rapid design iterations and in-system updates during prototyping and testing phases.
- Gate-array replacement Mid-density programmable alternative to fixed gate-array implementations where design flexibility and faster time-to-market are required.
- Industrial control and automation Industrial temperature rating and robust I/O control make the device suitable for control logic, custom sequencing, and interface tasks in industrial equipment.
- System glue logic and interface bridging Flexible I/O management and programmable slew-rate allow the FPGA to implement custom glue logic and interface bridging between subsystems.
Unique Advantages
- Reconfigurable in-system In-circuit reconfigurability enables firmware updates and functional changes without hardware replacement.
- Clearly defined mid-density capacity 1,320 logic elements and roughly 16,000 gates provide deterministic resource expectations for mid-range custom logic designs.
- Granular I/O control Per-pin tri-state enable and programmable slew-rate reduce design risk when integrating with mixed-speed peripherals.
- Industrial-rated operation −40 °C to 100 °C operating range and industrial grade designation support deployment in demanding environments.
- Standard surface-mount packaging 144‑pin LQFP footprint supports common PCB assembly flows and enables compact board layouts.
- Environmental compliance RoHS compliant for regulatory and manufacturing requirements.
Why Choose EPF6016ATI144-3?
The EPF6016ATI144-3 offers a balanced combination of reprogrammability, mid-density logic resources, and robust I/O control in a compact 144‑pin surface-mount package. Its OptiFLEX LUT-based architecture and dedicated interconnect features provide a predictable platform for custom logic, arithmetic, and glue-logic implementations.
This industrial-grade FPGA is well suited to teams replacing gate-array designs, performing in-field updates, or deploying flexible control and interface logic in applications that require a stable operating temperature range and clear resource sizing.
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