EPF6024ATC144-3
| Part Description |
FLEX 6000 Field Programmable Gate Array (FPGA) IC 117 1960 144-LQFP |
|---|---|
| Quantity | 1,410 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 117 | Voltage | 3 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 6 (Time on Label) | Number of LABs/CLBs | 196 | Number of Logic Elements/Cells | 1960 | ||
| Number of Gates | 24000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of EPF6024ATC144-3 – FLEX 6000 Field Programmable Gate Array (FPGA), 1,960 logic elements, 117 I/O, 144-LQFP
The EPF6024ATC144-3 is a FLEX 6000 family programmable logic device from Intel (Altera) that combines a register-rich, LUT-based architecture with the OptiFLEX area-efficiency approach. It provides 1,960 logic elements and a typical equivalent of 24,000 gates in a 144-pin surface-mount package, targeting low-cost alternatives to gate-array designs and rapid design iteration during prototyping and testing.
With 117 I/O pins, multi-voltage I/O capability described for the family, and in-circuit reconfigurability, this device is suited for embedded systems and control applications that require flexible I/O interfacing and field updates within a commercial temperature range.
Key Features
- Core architecture – Register-rich, LUT-based OptiFLEX architecture for efficient use of device area and routability.
- Logic capacity – 1,960 logic elements and approximately 24,000 typical gates, providing mid-range programmable capacity for control, glue logic, and custom functions.
- I/O and interfacing – 117 I/O pins to support system-level connectivity and bridging between subsystems operating at different voltages (family MultiVolt I/O operation).
- Reconfiguration and test – Supports in-circuit reconfigurability via external configuration devices or intelligent controllers; includes IEEE 1149.1 JTAG boundary-scan test circuitry (family feature).
- Clocking and interconnect – Built-in low-skew clock distribution tree and four low-skew global paths; FastTrack interconnect structure with dedicated carry and cascade chains for arithmetic and high-fan-in logic.
- Power and supply – Designed for 3.0 V to 3.6 V supply operation; family documentation notes low standby current (typical specification less than 0.5 mA in standby mode).
- Package and mounting – 144-LQFP package case (supplier package listed as 144-TQFP 20×20) with surface-mount mounting for compact PCB footprints.
- Commercial temperature grade – Rated for 0 °C to 85 °C operating temperature for standard commercial applications.
Typical Applications
- Prototyping and design validation – Use as a reprogrammable alternative to gate arrays for fast design changes and iterative testing during development cycles.
- Embedded control and glue logic – Implement custom control, timing, or interfacing functions where 1,960 logic elements and 117 I/O can consolidate discrete logic.
- Field-upgradable systems – In-circuit reconfiguration enables functional updates in deployed hardware via external configuration devices or controllers.
- Mixed-voltage system bridging – MultiVolt I/O operation enables interfacing between subsystems running at different voltage levels within commercial equipment.
Unique Advantages
- Reconfigurable during deployment – In-circuit reconfigurability allows design updates without board-level hardware changes, shortening maintenance and upgrade cycles.
- Balanced mid-range capacity – 1,960 logic elements and ~24,000 gates provide sufficient density for a wide range of control and glue-logic tasks while keeping board footprint and cost low.
- Flexible I/O count – 117 I/O pins offer broad connectivity for sensors, peripherals, and buses without needing external I/O expanders.
- Dedicated arithmetic support – Built-in carry and cascade chains simplify implementation of adders, counters, and comparators, reducing routing complexity and improving performance potential.
- Compact surface-mount package – 144-LQFP (supplier 144-TQFP 20×20) provides a compact, manufacturable form factor for space-constrained PCB layouts.
- Standard commercial temperature rating – 0 °C to 85 °C operation aligns with general-purpose embedded and consumer applications.
Why Choose EPF6024ATC144-3?
The EPF6024ATC144-3 positions itself as a practical, reprogrammable solution for engineers seeking a mid-density programmable logic device with flexible I/O and in-field update capability. Its OptiFLEX architecture, on-chip resources, and family-level features such as low-skew clocking, FastTrack interconnect, and JTAG boundary-scan support make it a suitable choice for prototyping, control logic, and system interfacing in commercial equipment.
This device is appropriate for teams that need a balance of capacity, configurability, and compact packaging, backed by the FLEX 6000 family design support and tooling referenced in the family documentation.
Request a quote or submit an inquiry to receive pricing, availability, and technical support information for the EPF6024ATC144-3.

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