XCV600-6BG560C
| Part Description |
Virtex® Field Programmable Gate Array (FPGA) IC 404 98304 15552 560-LBGA Exposed Pad, Metal |
|---|---|
| Quantity | 404 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | AMD |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 560-MBGA (42.5x42.5) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 560-LBGA Exposed Pad, Metal | Number of I/O | 404 | Voltage | 2.375 V - 2.625 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 3456 | Number of Logic Elements/Cells | 15552 | ||
| Number of Gates | 661111 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 98304 |
Overview of XCV600-6BG560C – Virtex® FPGA, 560-LBGA Exposed Pad
The XCV600-6BG560C is a high-density Virtex® field programmable gate array (FPGA) supplied in a 560-LBGA exposed pad package. It delivers substantial programmable logic and on-chip RAM for system-level designs, with features geared toward high-performance embedded and communications applications.
Built on an SRAM-based architecture, this device targets system designs that require reprogrammability, flexible I/O, and robust clock management while operating within a 2.375 V to 2.625 V supply and a commercial temperature range of 0 °C to 85 °C.
Key Features
- Core Logic — 15,552 logic elements (661,111 system gates) providing high-density programmable logic resources for complex functions and custom hardware acceleration.
- Configurable Logic Blocks — 3,456 CLBs arranged to support wide, hierarchical routing and placement for large designs.
- Embedded Memory — Total on-chip RAM of 98,304 bits, approximately 0.098 Mbits of embedded memory for LUT RAM and block RAM implementation.
- I/O Capacity — 404 user I/O pins to support broad connectivity and multiple peripheral interfaces.
- Multi-standard SelectIO™ — Support for multiple high-performance interface standards to simplify interfacing with a variety of external devices and memories.
- Clock Management — Four dedicated delay-locked loops (DLLs), multiple primary and secondary clock distribution nets for low-skew clocking across the device.
- SRAM-based Configuration — In-system reprogrammability with multiple programming modes to support iterative development and field updates.
- Package & Mounting — 560-LBGA exposed pad, metal package (560-MBGA, 42.5 × 42.5 mm), surface-mount mounting type for compact board integration and thermal pad support.
- Power & Temperature — Nominal voltage supply range 2.375 V to 2.625 V and commercial operating temperature from 0 °C to 85 °C.
- Compliance — RoHS compliant.
Typical Applications
- PCI and Compact PCI Systems — Meets PCI timing profiles and supports hot-swappable Compact PCI implementations for system I/O and bridging logic.
- High-performance Embedded Processing — Use as custom hardware accelerators or peripheral controllers thanks to dense logic and on-chip RAM.
- Communication Interfaces — Multi-standard SelectIO and abundant I/O make the device suitable for protocol bridging and I/O-heavy interface logic.
- Prototyping and In-system Reconfigurable Designs — SRAM-based configuration enables iterative development, verification, and field updates without hardware respins.
Unique Advantages
- High Logic Density: 15,552 logic elements and over 661k system gates permit implementation of large, complex logic functions on a single device.
- Flexible I/O Capability: 404 I/O pins and multi-standard SelectIO support simplify connectivity to diverse peripherals and memory devices.
- Integrated Clock Controls: Four DLLs and multiple clock distribution networks provide low-skew clocking options for timing-critical designs.
- Reprogrammable SRAM Architecture: In-system configuration modes enable rapid design iteration and field upgrades without board changes.
- Compact, Thermally Aware Package: 560-LBGA with exposed pad and metal package construction supports dense board layouts with thermal dissipation considerations.
- Development Ecosystem Support: Documented support for established FPGA development systems and libraries facilitates design flow integration.
Why Choose XCV600-6BG560C?
The XCV600-6BG560C delivers a balanced combination of logic capacity, embedded memory, and flexible I/O suitable for demanding system-level applications where reprogrammability and board-level integration matter. Its clock-management resources and high I/O count make it well suited for designs requiring precise timing and extensive external interfaces.
This device is aimed at engineers and teams developing high-performance embedded systems, communications interfaces, and platform prototypes that benefit from in-system configurability and a supported FPGA development ecosystem. The commercial-grade voltage and temperature specifications plus RoHS compliance make it appropriate for standard commercial deployments.
Request a quote or submit a sales inquiry for the XCV600-6BG560C to begin sourcing and integration into your next FPGA-based design.

Date Founded: 1969
Headquarters: Santa Clara, California, USA
Employees: 25,000+
Revenue: $22.68 Billion
Certifications and Memberships: ISO9001:2015, RoHS, REACH








