EP2AGX125EF29C6G
| Part Description |
Arria II GX Field Programmable Gate Array (FPGA) IC 372 8315904 118143 780-BBGA, FCBGA |
|---|---|
| Quantity | 1,713 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 26 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 780-FBGA (29x29) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 780-BBGA, FCBGA | Number of I/O | 372 | Voltage | 870 mV - 930 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 4964 | Number of Logic Elements/Cells | 118143 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 8315904 |
Overview of EP2AGX125EF29C6G – Arria II GX FPGA, 780‑FBGA (29×29)
The EP2AGX125EF29C6G is an Arria II GX family field programmable gate array (FPGA) IC from Intel, featuring a 40‑nm low‑power programmable logic architecture. Designed for systems that require substantial logic capacity, embedded memory and high‑speed serial connectivity, this device targets communications, networking, video and high‑performance embedded applications.
With 118,143 logic elements, approximately 8.316 Mbits of embedded memory and 372 I/O, the device balances on‑chip resources and I/O density for complex logic, buffering and interface functions while supporting power‑optimized operation through a low nominal core voltage range.
Key Features
- Programmable Logic Core – 40‑nm Arria II GX architecture with 118,143 logic elements for implementing large custom digital functions and state machines.
- Embedded Memory – Approximately 8.316 Mbits of on‑chip RAM for FIFOs, frame buffers and intermediate data storage.
- High‑Speed Transceivers (Series Feature) – Series architecture supports up to 24 full‑duplex clock data recovery (CDR)‑based transceivers with data rates from 600 Mbps to 6.375 Gbps for multi‑Gbps serial links.
- DSP and Arithmetic Blocks (Series Feature) – Dedicated DSP blocks and hardcoded arithmetic functions (multipliers, adders, accumulators) for signal processing tasks and high‑throughput math operations; DSP blocks rated up to 550 MHz in the device family documentation.
- Logic Efficiency – Adaptive logic module (ALM) architecture and eight‑input fracturable LUTs support efficient implementation of complex logic and packing density.
- I/O and Packaging – 372 user I/O lines in a 780‑FBGA (29×29) surface‑mount package, simplifying dense board integration and external interface routing.
- Power – Core supply range of 870 mV to 930 mV to support low‑voltage, power‑optimized designs.
- Operating Range and Compliance – Commercial grade device rated for 0 °C to 85 °C operation and RoHS compliant.
Typical Applications
- High‑Speed Networking: Implement multi‑GbE, backplane switching or custom packet processing using on‑chip transceivers and abundant logic resources.
- Video and Broadcast Systems: Use embedded memory and DSP resources for buffering, video preprocessing and real‑time signal chains.
- Telecommunications Infrastructure: Deploy the device for line cards, fronthaul/backhaul PHY implementations and protocol bridging that require multi‑Gbps serial links.
- High‑Performance Embedded Processing: Integrate custom accelerators, parallel datapaths and I/O‑rich subsystems for compute‑intensive embedded applications.
Unique Advantages
- Substantial Logic Capacity: 118,143 logic elements enable complex state machines, protocol handling and custom datapaths without excessive external logic.
- Significant On‑Chip Memory: Approximately 8.316 Mbits of embedded RAM reduce dependence on external memory for buffering and small FIFOs.
- High‑Speed Serial Connectivity: Support for up to 24 transceivers at rates up to 6.375 Gbps (Arria II family capability) simplifies multi‑Gbps link designs.
- Power‑Optimized Operation: Low core voltage range (870–930 mV) assists in minimizing power for battery‑sensitive or thermally constrained systems.
- Board Integration Friendly Package: 780‑FBGA (29×29) surface‑mount package provides dense I/O and compact footprint for space‑constrained PCBs.
- Commercial Temperature and RoHS Compliance: Rated for 0 °C to 85 °C operation and RoHS compliant for mainstream commercial deployments.
Why Choose EP2AGX125EF29C6G?
The EP2AGX125EF29C6G combines the Arria II GX family’s low‑power 40‑nm FPGA architecture with a generous logic count, substantial embedded memory and a high I/O count in a compact FBGA package. It is well suited to designers building communications, video and high‑performance embedded systems that require on‑chip processing, buffering and multi‑Gbps serial interfaces.
By leveraging the device’s integrated resources—logic elements, embedded RAM and high‑speed transceiver capabilities—engineers can reduce external component count, streamline board complexity and accelerate time‑to‑market while operating within commercial temperature and supply‑voltage constraints.
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