EP2AGZ300FF35C3N

IC FPGA 554 I/O 1152FBGA
Part Description

Arria II GZ Field Programmable Gate Array (FPGA) IC 554 18854912 298000 1152-BBGA, FCBGA

Quantity 1,315 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package1152-FBGA (35x35)GradeCommercialOperating Temperature0°C – 85°C
Package / Case1152-BBGA, FCBGANumber of I/O554Voltage870 mV - 930 mV
Mounting MethodSurface MountRoHS ComplianceRoHS CompliantREACH ComplianceREACH Unknown
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs11920Number of Logic Elements/Cells298000
Number of GatesN/AECCN3A001A2CHTS Code8542.39.0001
QualificationN/ATotal RAM Bits18854912

Overview of EP2AGZ300FF35C3N – Arria II GZ FPGA, 298,000 logic elements, ~18.85 Mbits RAM, 554 I/O, 1152-FBGA

The EP2AGZ300FF35C3N is an Arria II GZ field programmable gate array (FPGA) provided in a 1152-BBGA / 1152-FBGA (35 × 35) surface-mount package. It delivers high logic density and substantial on-chip memory alongside a high pin-count I/O complement for commercial-grade designs.

This device targets commercial applications that require large programmable logic capacity, significant embedded memory, and flexible I/O integration while operating within a core voltage range of 870 mV to 930 mV and a 0 °C to 85 °C temperature range.

Key Features

  • Logic Capacity — 298,000 logic elements (logic cells) to support complex programmable logic implementations and large combinational/sequential designs.
  • Embedded Memory — Approximately 18.85 Mbits of on-chip RAM to implement buffers, FIFOs, and local data storage without external memory.
  • High I/O Count — 554 user I/O pins for extensive peripheral and bus interfacing options across multiple banks.
  • Package and Mounting — 1152-BBGA (FCBGA) supplier package, 1152-FBGA (35×35) footprint; surface-mount mounting for compact PCB integration.
  • Power Supply — Core voltage operating range of 870 mV to 930 mV, enabling predictable power domain planning.
  • Commercial Grade — Rated for commercial temperature operation from 0 °C to 85 °C and RoHS compliant.

Typical Applications

  • High-density custom logic — Implement large-scale, application-specific logic functions that require extensive logic elements and embedded RAM.
  • I/O consolidation and bridge functions — Aggregate multiple interfaces or protocol bridges using the device’s 554 I/O pins to centralize system connectivity.
  • Embedded processing accelerators — Offload compute-intensive tasks to programmable logic using available logic capacity and on-chip memory.
  • Compact board-level systems — Integrate advanced programmable capability in space-constrained commercial products with the 1152-FBGA surface-mount package.

Unique Advantages

  • High logic density: 298,000 logic elements provide the headroom for complex designs and multi-function implementations.
  • Substantial on-chip memory: Approximately 18.85 Mbits of embedded RAM reduces dependence on external memory for many buffering and storage tasks.
  • Extensive I/O: 554 I/O pins enable broad interface support and flexible partitioning of signals across banks.
  • Compact, manufacturable package: 1152-FBGA (35×35) surface-mount package supports high-density PCB layouts and automated assembly processes.
  • Commercial temperature rating and RoHS compliance: Rated 0 °C to 85 °C and RoHS compliant for mainstream commercial product deployments.
  • Defined core voltage range: 870 mV to 930 mV core supply simplifies power-supply design and voltage planning.

Why Choose EP2AGZ300FF35C3N?

The EP2AGZ300FF35C3N combines large logic capacity, meaningful embedded memory, and a high I/O count in a compact 1152-FBGA surface-mount package, making it a practical choice for commercial systems that require significant programmable logic and on-chip storage. Its commercial temperature rating and RoHS compliance align it with standard production requirements.

This part is suited to designers and OEMs building complex FPGA-based subsystems where integration density, I/O flexibility, and predictable power/thermal planning are key selection criteria. The device’s specifications support scalable designs that balance logic, memory, and I/O without relying on external components for many core functions.

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