XCV1000E-6FG1156I
| Part Description |
Virtex®-E Field Programmable Gate Array (FPGA) IC 660 393216 27648 1156-BBGA |
|---|---|
| Quantity | 1,830 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | AMD |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1156-FBGA (35x35) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1156-BBGA | Number of I/O | 660 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 6144 | Number of Logic Elements/Cells | 27648 | ||
| Number of Gates | 1569178 | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 393216 |
Overview of XCV1000E-6FG1156I – Virtex®-E 1.8 V FPGA, 1156-BBGA
The XCV1000E-6FG1156I is a Virtex®-E field programmable gate array (FPGA) from AMD offering 27,648 logic elements, approximately 0.39 Mbits of embedded memory (393,216 bits) and 660 I/O pins in a 1156-BBGA package. It is supplied in a surface-mount 1156-FBGA (35×35) form factor and rated for industrial operation.
Designed for reprogrammable high-density logic and high-bandwidth I/O, this device supports a 1.71 V to 1.89 V core supply and operates across an extended temperature range of −40°C to 100°C. The device is RoHS compliant and includes family-level Virtex‑E features such as advanced I/O standards, SelectRAM+ memory architecture and built-in clock management circuitry.
Key Features
- Core Architecture Virtex‑E 1.8 V FPGA family architecture implemented in a 0.18 µm, 6‑layer metal process; optimized for high-density logic integration.
- Logic Capacity 27,648 logic elements and approximately 1,569,178 gates provide significant on-chip logic resources for complex designs.
- Embedded Memory Approximately 0.39 Mbits (393,216 bits) of on-chip RAM. The Virtex‑E family includes the SelectRAM+ memory hierarchy and True Dual‑Port BlockRAM capability for flexible memory configurations.
- I/O and Interface Support 660 user I/O pins. Series-level SelectI/O+ technology supports a wide range of high-performance interface standards, differential signaling (LVDS, BLVDS, LVPECL), and PCI‑compliant 3.3 V, 32/64‑bit operation at 33/66 MHz.
- Clock Management Built-in digital clock management with eight Delay‑Locked Loops (DLLs), supporting clock multiply/divide and DDR-friendly 50% duty-cycle synthesis for high-speed clocking.
- Package & Thermal 1156‑BBGA package (supplier device package: 1156‑FBGA, 35×35); surface mount. Industrial-grade operating temperature range −40°C to 100°C.
- Power Core supply voltage range 1.71 V to 1.89 V to match Virtex‑E 1.8 V internal logic requirements.
- Regulatory & Testing RoHS compliant and 100% factory tested as part of the Virtex‑E production product specification.
Typical Applications
- High‑Speed Interface Bridging Use where PCI 3.3 V and high‑performance differential standards (LVDS/LVPECL) are required for bridging or protocol adaptation.
- Memory Interface and Control Suitable for designs requiring high-bandwidth memory interfaces such as DDR SDRAM and ZBT SRAM support patterns described for the Virtex‑E family.
- Complex Digital Systems Ideal for dense logic implementations and system-level integration where on-chip logic, embedded RAM and multiple DLLs simplify clocking and data-path design.
Unique Advantages
- High-density logic integration: 27,648 logic elements enable complex designs with reduced external glue logic.
- Substantial I/O capability: 660 I/Os accommodate wide parallel buses, differential pairs, and mixed-signal interface requirements.
- Flexible memory architecture: Approximately 0.39 Mbits of on-chip RAM combined with SelectRAM+ family features supports diverse memory partitioning and dual-port configurations.
- Robust clocking: Eight DLLs and DDR-oriented clock synthesis simplify phase and frequency management for high-speed data paths.
- Industrial reliability: Surface-mount 1156‑BBGA package with −40°C to 100°C operating range and RoHS compliance for industrial environments.
- Reprogrammable platform: SRAM-based in-system configuration enables unlimited reprogramming for iterative development and field updates.
Why Choose XCV1000E-6FG1156I?
The XCV1000E-6FG1156I delivers a balance of high logic density, extensive I/O and embedded memory in an industrial-grade 1156‑BBGA package. Its Virtex‑E family features—selectable high-performance I/O standards, advanced memory hierarchy and comprehensive clock management—make it suitable for demanding system designs that require reconfigurability and high-bandwidth interfaces.
This device is well suited to engineering teams building complex digital systems, interface bridges and memory-rich controllers who need a reprogrammable, factory-tested FPGA platform backed by the Virtex‑E development ecosystem.
Request a quote or submit an inquiry for pricing and availability for the XCV1000E-6FG1156I today.

Date Founded: 1969
Headquarters: Santa Clara, California, USA
Employees: 25,000+
Revenue: $22.68 Billion
Certifications and Memberships: ISO9001:2015, RoHS, REACH








